1. Field of the Invention
The present invention relates to an integrated circuit and an electronic apparatus.
2. Description of the Related Art
To deal with a recent trend toward multiple functions and cost reduction of electronic apparatuses, an integrated circuit (IC) including a motor drive circuit for driving a plurality of motors has been developed. An integrated circuit (IC) which has a partial function of a DC-DC converter circuit for supplying electric power to an application specific integrated circuit (ASIC) including a motor and a central processing unit (CPU) has also been discussed (Japanese Patent Application Laid-Open No. 2006-20495).
On the other hand, to increase an integration degree of control circuits such as the CPU and ASIC, circuit miniaturization is promoted. As the miniaturization proceeds, voltage supplied to the CPU and ASIC is being lowered. For example, the voltage supplied to the CPU and ASIC is reduced by 1.6 V.
Generally, power supply voltage accuracy is defined as a proportion and, as the voltage is lower, the absolute value of allowable voltage fluctuations becomes smaller. For example, 10% of 5 V is 500 mV, but 10% of 1 V is only 100 mV, which is ⅕ of 500 mV. Thus, higher voltage accuracy is required as a voltage level becomes lower.
FIGS. 8A and 8B illustrate an operation of a conventional integrated circuit. The conventional integrated circuit illustrated in FIG. 8A includes an integrated circuit 81 having a function of generating a voltage pulse signal, a smoothing circuit 82 and a logic circuit (control circuit) 83 of an electronic apparatus.
The integrated circuit 81 outputs a reset signal RS for resetting the logic circuit 83. The smoothing circuit 82 smoothes a pulse voltage output from the integrated circuit 81 and supplies the smoothed voltage V8 to the logic circuit 83.
The integrated circuit 81 and the smoothing circuit 82 constitute a switching type power supply circuit. The switching type power supply circuit has higher energy efficiency than a dropper type power supply circuit.
FIG. 8B illustrates a timing waveform of the reset signal RS and the voltage V8 in the circuit illustrated in FIG. 8A.
At a timing t0, power supply to the logic circuit 83 which is a power load of a power supply circuit is stopped and the reset signal RS is output. The logic circuit 83 receives the reset signal RS and goes into a reset state. Under the reset state, a load current drops. On the other hand, energy of an inductor provided in the smoothing circuit 82 increases the voltage V8 supplied to the logic circuit 83. A voltage level Vp3 to which the voltage V8 increases is generated. A peak voltage Vp3 may exceed the maximum rated voltage of the logic circuit 83 and damage the logic circuit 83. In FIGS. 8B, 0V is zero voltage level.
A technique for discharging remaining charges from an image display apparatus at the time of start and stop of power supply is discussed in Japanese Patent Application Laid-Open No. 2002-333872.
With such a configuration, miniaturization and cost reduction of electronic apparatuses cannot be achieved.